• image of 逻辑门阵列的配置结构>AT17F040-30VJI
  • image of 逻辑门阵列的配置结构>AT17F040-30VJI
AT17F040-30VJI
Configuration Proms for FPGAs
Microchip Technology
Surface Mount
-
20-LCC (J-Lead)
YES

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image of 逻辑门阵列的配置结构>AT17F040-30VJI
image of 逻辑门阵列的配置结构>AT17F040-30VJI
AT17F040-30VJI
Configuration Proms for FPGAs
Microchip Technology
Surface Mount
-
20-LCC (J-Lead)
YES
TYPEDESCRIPTION
Mounting Type Surface Mount
Package / Case 20-LCC (J-Lead)
Surface Mount YES
Operating Temperature -40°C~85°C
Packaging Tube
Published 1997
JESD-609 Code e0
Part Status Obsolete
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 20
ECCN Code EAR99
Terminal Finish TIN LEAD
HTS Code 8542.32.00.51
Technology CMOS
Voltage - Supply 2.97V~3.63V
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 225
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 1.27mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number AT17F040
JESD-30 Code S-PQCC-J20
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.63V
Power Supplies 3/3.3V
Supply Voltage-Min (Vsup) 2.97V
Programmable Type FLASH
Memory Size 4Mb
Operating Mode SYNCHRONOUS
Clock Frequency 33MHz
Supply Current-Max 0.02mA
Organization 4MX1
Memory Width 1
Standby Current-Max 0.001A
Memory Density 4194304 bit
Parallel/Serial SERIAL
Memory IC Type CONFIGURATION MEMORY
Write Cycle Time-Max (tWC) 0.03ms
Length 8.9662mm
Height Seated (Max) 4.572mm
Width 8.9662mm
RoHS Status Non-RoHS Compliant
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