EPM5128LC-2 CPLDs_Electronic components_ Integrated circuit IC_ Semiconductor components_ Equipment procurement_ EIS LIMITED

TYPE	DESCRIPTION
Surface Mount	YES
JESD-609 Code	e0
Pbfree Code	no
Number of Terminations	68
ECCN Code	EAR99
Terminal Finish	Tin/Lead (Sn/Pb)
Additional Feature	LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code	8542.39.00.01
Terminal Position	QUAD
Terminal Form	J BEND
Peak Reflow Temperature (Cel)	220
Supply Voltage	5V
Terminal Pitch	1.27mm
Time@Peak Reflow Temperature-Max (s)	30
Pin Count	68
JESD-30 Code	S-PQCC-J68
Qualification Status	Not Qualified
Operating Temperature (Max)	70°C
Supply Voltage-Max (Vsup)	5.25V
Power Supplies	5V
Temperature Grade	COMMERCIAL
Supply Voltage-Min (Vsup)	4.75V
Number of I/O	52
Clock Frequency	40MHz
Propagation Delay	45 ns
Organization	7 DEDICATED INPUTS, 52 I/O
Programmable Logic Type	OT PLD
Output Function	MACROCELL
Number of Macro Cells	128
JTAG BST	NO
Number of Dedicated Inputs	7
In-System Programmable	NO
RoHS Status	Non-RoHS Compliant


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